/*
* Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
*
* Covers: * AT91SAM9G45-EKES board
* * AT91SAM9M10G45-EK board
*
* Copyright (C) 2009 Atmel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/

#include <linux/types.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/fb.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/leds.h>
#include <linux/clk.h>
#include <linux/atmel-mci.h>

#include <video/atmel_lcdc.h>

#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <linux/w1-gpio.h>
#include <mach/at91sam9_smc.h>
#include <mach/at91_shdwc.h>

#include <linux/spi/spi_gpio.h>
#include <linux/spi/ads7846.h>

#include <mach/at91_pmc.h>

#include "sam9_smc.h"
#include "generic.h"

#include <linux/videodev2.h>
#include <media/atmel-isi.h>

#include <linux/delay.h>

static void __init ek_map_io(void)
{
/* Initialize processor: 12.000 MHz crystal */
at91sam9g45_initialize(12000000);

/* DGBU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);

/* USART0 not connected on the -EK board */
/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
// at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);

at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);

/* set serial console to ttyS0 (ie, DBGU) */
at91_set_serial_console(0);
}

static void __init ek_init_irq(void)
{
at91sam9g45_init_interrupts(NULL);
}


/*
* USB HS Host port (common to OHCI & EHCI)
*/
static struct at91_usbh_data __initdata ek_usbh_hs_data = {
.ports = 2,
// .vbus_pin = {AT91_PIN_PD21, AT91_PIN_PD21},
//pi .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
};


/*
* USB HS Device port
*/
static struct usba_platform_data __initdata ek_usba_udc_data = {
//pi .vbus_pin = AT91_PIN_PB19,
};


/*
* ADS7846 Touchscreen
*/
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
static int ads7843_pendown_state(void)
{
return !at91_get_gpio_value(AT91_PIN_PD21); /* Touchscreen PENIRQ */
}

static struct ads7846_platform_data ads_info = {
.model = 7843,
.x_min = 150,
.x_max = 3830,
.y_min = 190,
.y_max = 3830,
.vref_delay_usecs = 100,
.x_plate_ohms = 450,
.y_plate_ohms = 250,
.pressure_max = 15000,
// .debounce_max = 3,
// .debounce_rep = 1,
// .debounce_tol = 10,
.debounce_max = 5,
.debounce_rep = 0,
.debounce_tol = 10,
.get_pendown_state = ads7843_pendown_state,
};

static void __init ek_add_device_ts(void)
{
// at91_set_B_periph(AT91_PIN_PD21, 1); /* External IRQ1, with pullup */

at91_set_gpio_output(AT91_PIN_PC10, 0);

at91_set_gpio_output(AT91_PIN_PD20, 0);
//for V2.A board revision at91_set_gpio_output(AT91_PIN_PC0, 0);
at91_set_gpio_output(AT91_PIN_PD23, 0);
at91_set_gpio_input(AT91_PIN_PD22, 1);
at91_set_gpio_input(AT91_PIN_PD21, 1);
}

/*

* GPIO SPI master
*/
struct spi_gpio_platform_data sk_spi_gpio_platform_data={
// .sck = AT91_PIN_PC0,
.sck = AT91_PIN_PD23,
.mosi = AT91_PIN_PD20,
.miso = AT91_PIN_PD22,
.num_chipselect = 1,
};
struct platform_device sk_spi_gpio_device={
.name="spi_gpio",
.id=3,
.dev = {
.platform_data = &sk_spi_gpio_platform_data,},
};
static void __init ek_add_device_spi_gpio(void)
{
platform_device_register(&sk_spi_gpio_device);
}


#else
static void __init ek_add_device_ts(void) {}
static void __init ek_add_device_spi_gpio(void) {}
#endif



/*
* SPI devices.
*/
static struct spi_board_info ek_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
},
/* S111 */
{
.modalias = "spidev",
.chip_select = 1,
.controller_data = AT91_PIN_PB2,
.max_speed_hz = 1 * 1000 * 1000,
.bus_num = 0,
},

{
.modalias = "spidev",
.chip_select = 1,
.controller_data = AT91_PIN_PB16,
.max_speed_hz = 1 * 1000 * 1000,
.bus_num = 1,
},

#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
{ /* ADS7846 */
.modalias = "ads7846",
.max_speed_hz = 1000000,
.bus_num = 3,
.controller_data = (void *)AT91_PIN_PC10,
.platform_data = &ads_info,
.irq = AT91_PIN_PD21,
},
#endif
};


/*
* Dallas 1-Wire
*/
static struct w1_gpio_platform_data w1_gpio_pdata = {
.pin = AT91_PIN_PB30,
.is_open_drain = 0,
};

static struct platform_device w1_device = {
.name = "w1-gpio",
.id = -1,
.dev.platform_data = &w1_gpio_pdata,
};

void add_w1(void)
{
at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
at91_set_multi_drive(w1_gpio_pdata.pin, 1);
platform_device_register(&w1_device);
}


/*
* MCI (SD/MMC)
*/
static struct mci_platform_data __initdata mci0_data = {
.slot[0] = {
.bus_width = 4,
.detect_pin = AT91_PIN_PC31,
.wp_pin = -1,
},
};

static struct mci_platform_data __initdata mci1_data = {
.slot[0] = {
.bus_width = 4,
.detect_pin = AT91_PIN_PD12,
// .wp_pin = AT91_PIN_PD29,
},
};


/*
* MACB Ethernet device
*/
static struct at91_eth_data __initdata ek_macb_data = {
// .phy_irq_pin = AT91_PIN_PB5,
.is_rmii = 0,
};


/*
* NAND flash
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
.name = "Boot partition",
.offset = 0,
.size = SZ_16M,
},
{
.name = "FS partition",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};

static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
{
*num_partitions = ARRAY_SIZE(ek_nand_partition);
return ek_nand_partition;
}

/* det_pin is not connected */
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 21,
.cle = 22,
.rdy_pin = AT91_PIN_PC8,
.enable_pin = AT91_PIN_PC14,
.partition_info = nand_partitions,
#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
.bus_width_16 = 1,
#else
.bus_width_16 = 0,
#endif
};

static struct sam9_smc_config __initdata ek_nand_smc_config = {
.ncs_read_setup = 0,
.nrd_setup = 2,
.ncs_write_setup = 0,
.nwe_setup = 2,

.ncs_read_pulse = 4,
.nrd_pulse = 4,
.ncs_write_pulse = 4,
.nwe_pulse = 4,

.read_cycle = 7,
.write_cycle = 7,

.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
.tdf_cycles = 3,
};

static void __init ek_add_device_nand(void)
{
/* setup bus-width (8 or 16) */
if (ek_nand_data.bus_width_16)
ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
else
ek_nand_smc_config.mode |= AT91_SMC_DBW_8;

/* configure chip-select 3 (NAND) */
sam9_smc_configure(3, &ek_nand_smc_config);

at91_add_device_nand(&ek_nand_data);
}


/*
* LCD Controller
*/
#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
#if defined(CONFIG_FB_ATMEL_SK_800X480)
static struct fb_videomode at91_tft_vga_modes[] = {
{

.name = "SK",
.refresh = 60,
.xres = 800, .yres = 480,
// .pixclock = KHZ2PICOS(30000),
.pixclock = KHZ2PICOS(45000),//33MHz

.left_margin = 100, .right_margin = 100,
.upper_margin = 12, .lower_margin = 1,
.hsync_len = 41, .vsync_len = 10,

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
/* 640x480x72Hz
.name = "SK",
.refresh = 60,
.xres = 640, .yres = 480,
// .pixclock = KHZ2PICOS(30000),
.pixclock = KHZ2PICOS(45000),//33.33M
// .pixclock = KHZ2PICOS(80000),//44.44M

.left_margin = 128, .right_margin = (24 +48),
.upper_margin = 28, .lower_margin = (9 + 3),
.hsync_len = (40 + 0), .vsync_len = 3,

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,*/
/*640x480x60 .name = "SK",
.refresh = 60,
.xres = 640, .yres = 480,
// .pixclock = KHZ2PICOS(30000),//22.22M
.pixclock = KHZ2PICOS(35000),//26.666

.left_margin = 50, .right_margin = (50 + 0),
.upper_margin = 40, .lower_margin = (35 + 0),
.hsync_len = (60 + 0), .vsync_len = 10,

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,*/
/*640x480x60 .name = "SK",
.refresh = 60,
.xres = 640, .yres = 480,
// .pixclock = KHZ2PICOS(80000),//44.4
.pixclock = KHZ2PICOS(35000),//33.3

.left_margin = (48), .right_margin = (16),
.upper_margin = (31 + 0), .lower_margin = (11 + 0),
.hsync_len = (60 + 0), .vsync_len = 2,

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,*/
/*800x600x60 .name = "SK",
.refresh = 60,
.xres = 800, .yres = 600,
.pixclock = KHZ2PICOS(80000),//44.4

.left_margin = (88), .right_margin = (40),
.upper_margin = (23 + 0), .lower_margin = (1 + 0),
.hsync_len = (60 + 0), .vsync_len = 4,

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,*/
/*1024x768 .name = "SK",
.refresh = 60,
.xres = 1024, .yres = 768,
.pixclock = KHZ2PICOS(66000),//44.4

.left_margin = (100), .right_margin = (100),
.upper_margin = (50 + 0), .lower_margin = (50 + 0),
.hsync_len = (60 + 0), .vsync_len = 20,

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,*/
},
};

static struct fb_monspecs at91fb_default_monspecs = {
.manufacturer = "SK",
.monitor = "SK-T070-Plug",

.modedb = at91_tft_vga_modes,
.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
.hfmin = 15000,
.hfmax = 64000,
.vfmin = 50,
.vfmax = 150,
};
#else

#if defined(CONFIG_FB_ATMEL_SK_480X272)
static struct fb_videomode at91_tft_vga_modes[] = {
{
.name = "SK",
.refresh = 60,
.xres = 480, .yres = 272,
.pixclock = KHZ2PICOS(8800),

.left_margin = 2, .right_margin = 2,
.upper_margin = 12, .lower_margin = 1,
.hsync_len = 41, .vsync_len = 10,

/* .left_margin = 0, .right_margin = 0,
.upper_margin = 22, .lower_margin = 0,
.hsync_len = 48, .vsync_len = 16,
*/

.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
};

static struct fb_monspecs at91fb_default_monspecs = {
.manufacturer = "SK",
.monitor = "SK-MI0430FT-Plug",

.modedb = at91_tft_vga_modes,
.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
.hfmin = 15000,
.hfmax = 17640,
.vfmin = 57,
.vfmax = 67,
};
#else
static struct fb_videomode at91_tft_vga_modes[] = {
{
.name = "LG",
.refresh = 60,
.xres = 480, .yres = 272,
.pixclock = KHZ2PICOS(9000),

.left_margin = 1, .right_margin = 1,
.upper_margin = 40, .lower_margin = 1,
.hsync_len = 45, .vsync_len = 1,


.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
};

static struct fb_monspecs at91fb_default_monspecs = {
.manufacturer = "LG",
.monitor = "LB043WQ1",

.modedb = at91_tft_vga_modes,
.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
.hfmin = 15000,
.hfmax = 17640,
.vfmin = 57,
.vfmax = 67,
};
#endif
#endif

#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
| ATMEL_LCDC_DISTYPE_TFT \
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)

/* Driver datas */
static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
.lcdcon_is_backlight = true,
//pi!!! .default_bpp = 32,
.default_bpp = 16,
// .default_bpp = 24,
.default_dmacon = ATMEL_LCDC_DMAEN,
.default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
.default_monspecs = &at91fb_default_monspecs,
.guard_time = 9,
.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
.smem_len = 0,
};

#else
static struct atmel_lcdfb_info __initdata ek_lcdc_data;
#endif


/*
* Touchscreen
*/
static struct at91_tsadcc_data ek_tsadcc_data = {
.adc_clock = 300000,
.pendet_debounce = 0x0d,
.ts_sample_hold_time = 0x0a,
};


/*
* GPIO Buttons
*/
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button ek_buttons[] = {
{ /* BP1, "leftclic" */
.code = BTN_LEFT,
// .gpio = AT91_PIN_PB6,
.active_low = 1,
.desc = "left_click",
.wakeup = 1,
},
{ /* BP2, "rightclic" */
.code = BTN_RIGHT,
// .gpio = AT91_PIN_PB7,
.active_low = 1,
.desc = "right_click",
.wakeup = 1,
},
/* BP3, "joystick" */
{
.code = KEY_LEFT,
// .gpio = AT91_PIN_PB14,
.active_low = 1,
.desc = "Joystick Left",
},
{
.code = KEY_RIGHT,
// .gpio = AT91_PIN_PB15,
.active_low = 1,
.desc = "Joystick Right",
},
{
.code = KEY_UP,
// .gpio = AT91_PIN_PB16,
.active_low = 1,
.desc = "Joystick Up",
},
{
.code = KEY_DOWN,
//pi .gpio = AT91_PIN_PB17,
.active_low = 1,
.desc = "Joystick Down",
},
{
.code = KEY_ENTER,
//pi .gpio = AT91_PIN_PB18,
.active_low = 1,
.desc = "Joystick Press",
},
};

static struct gpio_keys_platform_data ek_button_data = {
.buttons = ek_buttons,
.nbuttons = ARRAY_SIZE(ek_buttons),
};

static struct platform_device ek_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &ek_button_data,
}
};

static void __init ek_add_device_buttons(void)
{
int i;

for (i = 0; i < ARRAY_SIZE(ek_buttons); i++) {
at91_set_GPIO_periph(ek_buttons[i].gpio, 1);
at91_set_deglitch(ek_buttons[i].gpio, 1);
}

platform_device_register(&ek_button_device);
}
#else
static void __init ek_add_device_buttons(void) {}
#endif


/*
* AC97
* reset_pin is not connected: NRST
*/
static struct ac97c_platform_data ek_ac97_data = {
};


/*
* LEDs ... these could all be PWM-driven, for variable brightness
*/
static struct gpio_led ek_leds[] = {
{ /* "top" led, red, powerled */
.name = "d8",
// .gpio = AT91_PIN_PD30,
.default_trigger = "heartbeat",
},
{ /* "left" led, green, userled2, pwm3 */
.name = "d6",
// .gpio = AT91_PIN_PD0,
.active_low = 1,
.default_trigger = "nand-disk",
},
#if !(defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE))
{ /* "right" led, green, userled1, pwm1 */
.name = "d7",
// .gpio = AT91_PIN_PD31,
.active_low = 1,
.default_trigger = "mmc0",
},
#endif
};


/*
* PWM Leds
*/
static struct gpio_led ek_pwm_led[] = {
#if defined(CONFIG_LEDS_ATMEL_PWM) || defined(CONFIG_LEDS_ATMEL_PWM_MODULE)
{ /* "right" led, green, userled1, pwm1 */
.name = "d7",
.gpio = 1, /* is PWM channel number */
.active_low = 1,
.default_trigger = "none",
},
#endif
};

static void __init pck1_set_clk(void)
{
struct clk *pck1;
struct clk *plla;
int i;

pck1 = clk_get(NULL, "pck1");
plla = clk_get(NULL, "plla");

at91_set_B_periph(AT91_PIN_PE31, 0); /* PCK1 */
// at91_set_B_periph(AT91_PIN_PA31, 0); /* PCK0 */
clk_set_parent(pck1, plla);
clk_put(plla);
clk_set_rate(pck1,25000000);
clk_enable(pck1);
}


/*
* ISI
*/
//#ifdef _USE_IMAGE_SENSOR_
#if defined(CONFIG_VIDEO_ATMEL_ISI)
static struct isi_platform_data __initdata isi_data = {
.image_hsize = 860,
.image_vsize = 620,
.prev_hsize = 320,
.prev_vsize = 240,
.frate = 2,
// .pixfmt = ATMEL_ISI_PIXFMT_YCbYCr,
.pixfmt = ATMEL_ISI_PIXFMT_CbYCrY,
.capture_v4l2_fmt = V4L2_PIX_FMT_YUYV,
.streaming_v4l2_fmt = V4L2_PIX_FMT_YUYV,
/* to use codec and preview path simultaneously */
// .cr1_flags = ISI_FULL,
};

#endif

static void __init atm0430d5_tft_init()
{
void __iomem *mmio = ioremap(AT91SAM9G45_LCDC_BASE, SZ_4K);
__raw_writel(__raw_readl(mmio+ATMEL_LCDC_TIM1)|(1<<31)|(1<<24), mmio+ATMEL_LCDC_TIM1);
iounmap(mmio);
}

static void __init ek_board_init(void)
{
int value;
/* Serial */
at91_add_device_serial();
/* USB HS Host */
at91_add_device_usbh_ohci(&ek_usbh_hs_data);
at91_add_device_usbh_ehci(&ek_usbh_hs_data);
/* USB HS Device */
at91_add_device_usba(&ek_usba_udc_data);
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
/* SPI */
ek_add_device_ts();
ek_add_device_spi_gpio();
#else
/* Touch Screen */
at91_add_device_tsadcc(&ek_tsadcc_data);
#endif
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
/* MMC */
at91_add_device_mci(0, &mci0_data);
at91_add_device_mci(1, &mci1_data);
/* Ethernet */
at91_add_device_eth(&ek_macb_data);
/* NAND */
ek_add_device_nand();
/* I2C */
at91_add_device_i2c(0, NULL, 0);
/* LCD Controller */
//for V2.A board revision at91_set_gpio_output(AT91_PIN_PD23, 1);//enable BL
at91_set_gpio_output(AT91_PIN_PC0, 1);//enable BL for V2.B board revision
at91_add_device_lcdc(&ek_lcdc_data);
/*
// at91_set_gpio_output(AT91_PIN_PE6, 0);//DE
at91_set_gpio_output(AT91_PIN_PC0, 0);//DSEL
at91_set_gpio_output(AT91_PIN_PD21, 1);//BSEL
at91_set_gpio_output(AT91_PIN_PC2, 0);//PD
msleep(100);
at91_set_gpio_output(AT91_PIN_PC2, 1);//PD*/
// at91_set_gpio_output(AT91_PIN_PE3, 0);//enable BL for V2.B board revision
// at91_set_gpio_output(AT91_PIN_PE4, 0);//enable BL for V2.B board revision
// value = at91_sys_read(ATMEL_LCDC_TIM1);
// value = __raw_readl(0x00500808);
// at91_sys_write(ATMEL_LCDC_TIM1,value | (0x80000000 | (1<<24)));
// __raw_writel(value | (0x80000000 | (1<<24)),0x00500808);
// atm0430d5_tft_init();//for HS and VS (on DE) some offset

/* Touch Screen */
// at91_add_device_tsadcc(&ek_tsadcc_data);
/* Push Buttons */
ek_add_device_buttons();
/* AC97 */
at91_add_device_ac97(&ek_ac97_data);
/* LEDs */
// at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));

//#ifdef _USE_IMAGE_SENSOR_
#if defined(CONFIG_VIDEO_ATMEL_ISI)
at91_add_device_isi(&isi_data);
#endif

#ifdef CONFIG_W1
add_w1();
#endif
pck1_set_clk();

}

MACHINE_START(AT91SAM9G45EKES, "SK-9G45-OEM")
/* Maintainer: Atmel */
.phys_io = AT91_BASE_SYS,
.io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
.boot_params = AT91_SDRAM_BASE + 0x100,
.timer = &at91sam926x_timer,
.map_io = ek_map_io,
.init_irq = ek_init_irq,
.init_machine = ek_board_init,
MACHINE_END

w1_slave_driver 10-0008022e5281: 18S20 doesn't respond to CONVERT_TEMP.
w1_slave_driver 10-0008022e5281: 18S20 doesn't respond to CONVERT_TEMP.
w1_slave_driver 10-0008019fa356: 18S20 doesn't respond to CONVERT_TEMP.
w1_slave_driver 10-0008019fa356: 18S20 doesn't respond to CONVERT_TEMP.
w1_slave_driver 10-0008019fa356: 18S20 doesn't respond to CONVERT_TEMP.
root@arm9260:~#

--- w1_io.c.orig 2012-02-27 13:59:26.000000000 +0300
+++ w1_io.c 2012-02-28 10:48:53.000000000 +0300
@@ -79,15 +79,25 @@
*/
static void w1_write_bit(struct w1_master *dev, int bit)
{
+ unsigned long flags;
+
if (bit) {
+ /* write 1 timing is critical here */
+ local_irq_save(flags);
dev->bus_master->write_bit(dev->bus_master->data, 0);
w1_delay(6);
dev->bus_master->write_bit(dev->bus_master->data, 1);
+ local_irq_restore(flags);
+
w1_delay(64);
} else {
+ /* write 0 timing is critical here */
+ local_irq_save(flags);
dev->bus_master->write_bit(dev->bus_master->data, 0);
w1_delay(60);
dev->bus_master->write_bit(dev->bus_master->data, 1);
+ local_irq_restore(flags);
+
w1_delay(10);
}
}
@@ -318,6 +328,7 @@
int w1_reset_bus(struct w1_master *dev)
{
int result;
+ unsigned long flags;

if (dev->bus_master->reset_bus)
result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
@@ -331,10 +342,15 @@
* the maximum amount of time.
*/
w1_delay(480);
+
+ /* precense timing is critical here */
+ local_irq_save(flags);
dev->bus_master->write_bit(dev->bus_master->data, 1);
w1_delay(70);

result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
+ local_irq_restore(flags);
+
/* minmum 70 (above) + 410 = 480 us
* There aren't any timing requirements between a reset and
* the following transactions. Sleeping is safe here.