nand {
pinctrl_nand: nand-0 {
atmel,pins =
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
};

pinctrl_nand_16bits: nand_16bits-0 {
atmel,pins =
<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
};
};

nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x40000000 0x10000000
0xffffe000 0x600
0xffffe600 0x200
0x100000 0x100000>;
atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
atmel,nand-addr-offset = <0x15>;
atmel,nand-cmd-offset = <0x16>;
atmel,nand-has-dma;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioD 5 GPIO_ACTIVE_HIGH &pioD 4 GPIO_ACTIVE_HIGH 0>;
status = "okay";
nand-bus-width = <0x8>;
nand-ecc-mode = "hw";
atmel,has-pmecc;
atmel,pmecc-cap = <0x2>;
atmel,pmecc-sector-size = <0x200>;
nand-on-flash-bbt;

at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>; //<0x0 0x100000>;
};

uboot@40000 {
label = "u-boot";
reg = <0x40000 0x80000>; //<0x100000 0x100000>;
};

ubootenv@c0000 {
label = "u-boot env";
reg = <0xc0000 0x140000>; //<0x200000 0x200000>;
};

kernel@200000 {
label = "kernel";
reg = <0x200000 0x400000>;
};
settings@800000 {
label = "settings";
reg = <0x800000 0x200000>;
};
rootfs@A00000 {
label = "rootfs";
reg = <0xA00000 0xDC00000>;
};
};

[ 5.010000] atmel_nand 40000000.nand: Use On Flash BBT
[ 5.020000] atmel_nand 40000000.nand: Using dma0chan2 for DMA transfers.
[ 5.030000] nand: device found, Manufacturer ID: 0xec, Chip ID: 0xda
[ 5.030000] nand: Samsung NAND 256MiB 3,3V 8-bit
[ 5.040000] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[ 5.040000] atmel_nand 40000000.nand: can't detect min. ECC, assume 2 bits in 512 bytes
[ 5.050000] atmel_nand 40000000.nand: Initialize PMECC params, cap: 2, sector: 512
[ 5.060000] Bad block table found at page 131008, version 0x01
[ 5.070000] Bad block table found at page 130944, version 0x01
[ 5.070000] nand_read_bbt: bad block at 0x000006260000
[ 5.080000] nand_read_bbt: bad block at 0x0000080e0000
[ 5.080000] nand_read_bbt: bad block at 0x000008e40000
[ 5.090000] 6 ofpart partitions found on MTD device atmel_nand
[ 5.090000] Creating 6 MTD partitions on "atmel_nand":
[ 5.100000] 0x000000000000-0x000000040000 : "at91bootstrap"
[ 5.110000] 0x000000040000-0x0000000c0000 : "u-boot"
[ 5.120000] 0x0000000c0000-0x000000200000 : "u-boot env"
[ 5.120000] 0x000000200000-0x000000600000 : "kernel"
[ 5.130000] 0x000000800000-0x000000a00000 : "settings"
[ 5.140000] 0x000000a00000-0x00000e600000 : "rootfs"

[ 0.632812] atmel_nand 40000000.nand: Use On Flash BBT
[ 0.632812] atmel_nand 40000000.nand: Using dma0chan0 for DMA transfers.
[ 0.640625] nand: second ID read did not match 30,98 against a0,57
[ 0.648437] nand: No NAND device found

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5

/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC 1
#define CONFIG_ATMEL_NAND_HW_PMECC 1
#define CONFIG_PMECC_CAP 2
#define CONFIG_PMECC_SECTOR_SIZE 512
#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
#define CONFIG_CMD_NAND_TRIMFFS

#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#endif