typedef struct _AT91S_SPI {
AT91_REG SPI_CR; // Control Register
AT91_REG SPI_MR; // Mode Register
AT91_REG SPI_RDR; // Receive Data Register
AT91_REG SPI_TDR; // Transmit Data Register
AT91_REG SPI_SR; // Status Register
AT91_REG SPI_IER; // Interrupt Enable Register
AT91_REG SPI_IDR; // Interrupt Disable Register
AT91_REG SPI_IMR; // Interrupt Mask Register
AT91_REG Reserved0[4]; //
AT91_REG SPI_CSR[4]; // Chip Select Register
AT91_REG Reserved1[48]; //
AT91_REG SPI_RPR; // Receive Pointer Register
AT91_REG SPI_RCR; // Receive Counter Register
AT91_REG SPI_TPR; // Transmit Pointer Register
AT91_REG SPI_TCR; // Transmit Counter Register
AT91_REG SPI_RNPR; // Receive Next Pointer Register
AT91_REG SPI_RNCR; // Receive Next Counter Register
AT91_REG SPI_TNPR; // Transmit Next Pointer Register
AT91_REG SPI_TNCR; // Transmit Next Counter Register
AT91_REG SPI_PTCR; // PDC Transfer Control Register
AT91_REG SPI_PTSR; // PDC Transfer Status Register
} AT91S_SPI, *AT91PS_SPI;

void *base;
off_t addr = spibase;

//Задаем размер карты
unsigned long map_size = 4096Ul;
unsigned long map_mask = map_size - 1;
try {
if ( FileMem != -1 )
//Создаем проекцию контроллера на памяти
base =
mmap(0, map_size, PROT_READ | PROT_WRITE, MAP_SHARED, FileMem,
addr & ~map_mask);
else throw 1;

if (base == (void *) -1) {
throw 1;
}

fprintf(stderr, "SPI: Memory mapped at address %p.\n", base);
//Возвращаем указатель на начало памяти с проекцией
//spi_regs = (AT91S_SPI *) ((uint32_t)base + (addr & map_mask));
spi_regs = (AT91S_SPI *) ((intptr_t)base + (addr & map_mask));
} catch (int val) {
fprintf(stderr, "SPI: Cannot be mapped.\n");
}

void spi::Write(unsigned int npcs, unsigned short data) {
//Отправка данных
while ( (spi_regs->SPI_SR & 0x1 << 9) == 0 ); // (SPI) TXEMPTY Interrupt
spi_regs->SPI_TDR = data | ((~(1 << npcs) & 0xF) << 16);
while ( (spi_regs->SPI_SR & 0x1 << 1) == 0 ); // (SPI) Transmit Data Register Empty
}

( (spi_regs->SPI_SR & 0x1 << 9) == 0 )

spi_regs->SPI_TDR = data | ((~(1 << npcs) & 0xF) << 16);

After enabling the SPI, a data transfer begins when the processor writes to the SPI_TDR (Trans-
mit Data Register). The written data is immediately transferred in the Shift Register and transfer
on the SPI bus starts. While the data in the Shift Register is shifted on the MOSI line, the MISO
line is sampled and shifted in the Shift Register. Transmission cannot occur without reception.
Before writing the TDR, the PCS field must be set in order to select a slave.